1. Field of the Invention
The present invention relates to a liquid crystal display device and, more specifically, to an In-Plane Switching (referred to as “IPS” hereinafter) active matrix type liquid crystal display device which is of a high numerical aperture and a high contrast.
2. Description of the Related Art
Recently, the use of IPS for large-scaled monitors of TV (television sets) and the like has become popular. The IPS enables a display by rotating axes of liquid crystal molecules within a plane in parallel to a substrate by a transverse electric field. Thus, there is no viewing angle dependency for the angles of the rise of the molecular axes, so that the viewing angle property thereof becomes advantageous greatly compared to that of TN (Twisted Nematic) mode (see Japanese Unexamined Patent Publication 2002-323706 (Patent Document 1), pp. 20-24, FIG. 1, for example).
In the meantime, with the IPS, pixel electrodes and common electrodes are arranged in a comb-like form, and a lateral electric field is applied thereto. Thus, the proportion of the electrode area occupying the display region becomes high, which results in having a low numerical aperture. However, recently, there has been an improvement in regards to such issue. As a related technique of the present invention, an example of the IPS will be described. FIG. 13A shows a plan view of a single sub-pixel, and FIG. 13B shows a sectional view taken along a line A-A′ of FIG. 13A. FIG. 13A shows a plan view of a TFT (Thin Film Transistor) substrate side which constitutes a liquid crystal display device.
A sub-pixel 1351 shown in FIG. 13A and FIG. 13B will be described. On a TFT substrate 1331, a scan signal wiring 1301 formed with a first metal layer and two parallel common signal wirings 1302 are formed. A gate insulating film 1303 is formed on the scan signal wiring 1301 and the common signal wirings 1302, and a video signal line 1304 formed with a second metal layer, a thin film semiconductor layer 1305, as well as a source electrode 1306 formed with the second metal layer are formed on the gate insulating film 1303. A passivation film 1307 is formed on the video signal wiring 1304, the thin film semiconductor layer 1305, and the source electrode 1306, and a flattening film 1308 made with an organic film is further formed on the passivation film 1307. A pixel electrode 1309 made with a transparent conductive film and a common electrode 1310 made with a transparent conductive film are formed on the flattening film 1308.
The video signal wiring 1304 in its wiring width direction is completely covered by the common electrode 1310 via the passivation film 1307 and the flattening film 1308. Note here that the pixel electrode 1309 is electrically connected to the source electrode 1306 via a contact hole 1312, and the common electrode 1310 is electrically connected to the common signal wiring 1302 via a contact hole 1312. A region where the common signal wiring 1302 and the source electrode 1306 overlap on one another becomes a storage capacitor 1341. Hereinafter, the contact hole connecting the common electrode and the common signal wiring is referred to as a “common-electrode contact hole”, and the contact hole connecting the pixel electrode and the source electrode is referred to as a “pixel-electrode contact hole”.
On a counter electrode 1332 side, a columnar spacer 1315 for keeping the gap between the counter substrate 1332 and the TFT substrate 1331 is formed. In a periphery of the part of the TFT substrate 1331 where the columnar spacer 1315 is placed, there is a recessed region 1314 where there is no flattening film 1308. The recessed region 1314 is provided in a wider range than the size (width direction) of the columnar spacer 1315 by considering the shift between the TFT substrate 1331 and the counter substrate 1332. Other than that, the flattening film 1308 exists on the entire surface of the sub-pixel 1351 except for the area in the vicinity of the pixel electrode contact hole 1311 which connects the pixel electrode 1309 and the source electrode 1306.
A display region 1343 is a region where the pixel electrode 1309 and the common electrode 1310 are formed in a comb-like pattern. This region exhibits a high flat property since the flattening film 1308 is provided as the base, so that it is possible to have a fine alignment. Further, the pixel electrode 1309 and the common electrode 1310 arranged in a comb-like pattern are both formed with the transparent electrodes, so that the region thereof also contributes to the transmittance. The video signal wiring 1304 in its wiring width direction is completely covered from the above by the common electrode 1310. Because of such structure, the aperture part that transmits visible light can be expanded to the vicinity of the fringe of the video signal wiring 1304.
Patent Document 1: Japanese Unexamined Patent Publication 2002-323706 (pp. 20-24, FIG. 1) With recent liquid crystal display devices, high-definition screens and narrower pitches thereof are advanced more and more due to increases in high end use such as medical fields and the like. Thus, a higher numerical aperture is desired. For that, a large area is required for acquiring a large storage capacitor. However, with the related technique described above, the higher the definition becomes, the higher the proportion of the storage capacitor occupying the pixel area becomes. This makes it difficult to achieve a high numerical aperture.
It is therefore an exemplary object of the present invention to provide a liquid crystal display device which can secure a large storage capacitor with a small area by a structure that can provide a uniform and fine alignment through forming a flattening film in a display region.